Check implementation of enabling/disabling of single DCDC converter pairs or layers in BPixelTools

Check power pigtails in system

Implement readback of module current in BPixelTools

Check change in current as a function of module Vana setting

Check functionality of RDA passing for CB L3 and L4 (currently not possible due to broken L4 connector)

Implement procedure for full chain test including all tests we did so far: CCU redundancy, i2c programming, DOH/PLL setting, Delay25 scan for SDA, Delay25 scan for RDA, …

Check LV and HV distribution

Check that reset does not trigger cross-talk

Implement reading of QPLL pia register

Check TBMPLL delay settings

Cross check ADC calibration and slope measurement against ETH

Bend flex cables as much as possible and see if they still function electrically

Survey temperatures on components

test adapter prints for modules

Power and load board: equip L12 CB with power cables. Measure voltage drops for L12.

Make power pigtails

Make & test board to inject signals simultaneously

Install Phase 1 POS