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To Do List
Power
Check implementation of enabling/disabling of single DCDC converter pairs or layers in BPixelTools
Check power pigtails in system
Implement readback of module current in BPixelTools
Full chain test
Check change in current as a function of module Vana setting
Check functionality of RDA passing for CB L3 and L4 (currently not possible due to broken L4 connector)
Implement procedure for full chain test including all tests we did so far: CCU redundancy, i2c programming, DOH/PLL setting, Delay25 scan for SDA, Delay25 scan for RDA, …
Check LV and HV distribution
Check that reset does not trigger cross-talk
Implement reading of QPLL pia register
Digital FED
Optical signals
Hardware
Pixel Online Software
Implement modules for L1, L2, L34
Check reading from FIFO3 (to use calibrations implemented by pilot)
Implement POH bias scan using TBM header counting (for given TBM/ROC delay settings)
Run S-curve and compare noise to module test