Check implementation of enabling/disabling of single DCDC converter pairs or layers in BPixelTools

Check HV distribution to module

Check change in current as a function of module Vana setting

Check functionality of RDA passing for CB L3 and L4 (currently not possible due to broken L4 connector)

Implement procedure for full chain test including all tests we did so far: CCU redundancy, i2c programming, DOH/PLL setting, Delay25 scan for SDA, Delay25 scan for RDA, …

Check LV and HV distribution

Look at module data with digital FED

Set module in no-token pass mode and check if we only see TBM header and trailors

Test new FEDs and piggy

Repeat optical performance measurements using analog FED

Repeat ADC calibration using scope

Perform measurements at cold

Bend flex cables as much as possible and see if they still function electrically

Survey temperatures on components

make adapter prints for modules

make board to check power distribution

make board to inject signals simultaneously

Install Phase 1 POS