phase1:phase1:todo
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| Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
| phase1:phase1:todo [2016/02/24 11:45] – [Modules] leac | phase1:phase1:todo [2016/09/28 14:06] (current) – [Optical signals] leac | ||
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| Line 7: | Line 7: | ||
| ===== Power ===== | ===== Power ===== | ||
| - | * Check implementation of enabling/ | + | * Check power pigtails |
| - | * Check HV distribution to module | + | |
| ===== Full chain test ===== | ===== Full chain test ===== | ||
| - | * Check change in current as a function of module Vana setting | ||
| - | * Check reading of RDA signal with pxFEC | ||
| - | * Check functionality of RDA passing for CB L3 and L4 (currently not possible due to broken L4 connector) | ||
| * Implement procedure for full chain test including all tests we did so far: CCU redundancy, i2c programming, | * Implement procedure for full chain test including all tests we did so far: CCU redundancy, i2c programming, | ||
| * Check LV and HV distribution | * Check LV and HV distribution | ||
| + | * Check that reset does not trigger cross-talk | ||
| + | * Implement reading of QPLL pia register | ||
| + | |||
| Line 23: | Line 22: | ||
| ===== Digital FED ===== | ===== Digital FED ===== | ||
| - | * Look at module data with digital FED | + | * Check TBMPLL delay settings |
| - | * Set module in no-token pass mode and check if we only see TBM header and trailors | + | |
| - | * Test new FEDs and piggy | + | |
| ===== Optical signals ===== | ===== Optical signals ===== | ||
| - | | + | * Perform |
| - | * Repeat ADC calibration using scope | + | |
| - | | + | |
| - | ===== Mechanical ===== | + | |
| - | + | ||
| - | * Bend flex cables as much as possible and see if they still function electrically | + | |
| - | * Survey temperatures on components | + | |
| ===== Hardware ===== | ===== Hardware ===== | ||
| - | * make adapter prints | + | * Power and load board: equip L12 CB with power cables. Measure voltage drops for L12. |
| - | * make board to check power distribution | + | * Test CB L4 |
| - | * make board to inject signals simultaneously | + | * Test POHs |
| - | ===== Software ===== | + | ===== Pixel Online |
| - | * Install Phase 1 POS | + | * Implement modules for L1, L2, L34 |
| + | * Check reading from FIFO3 (to use calibrations implemented by pilot) | ||
| + | * Implement POH bias scan using TBM header counting (for given TBM/ROC delay settings) | ||
| + | * Run S-curve and compare noise to module test | ||
phase1/phase1/todo.1456310757.txt.gz · Last modified: 2016/02/24 11:45 by leac
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